Microprocessor Fundamentals
A microprocessor is a programmable VLSI/ULSI integrated circuit that implements the CPU functions: arithmetic and logic, control, registers and machine-instruction execution. External memory, I/O interfaces, clocking, reset and power circuitry are normally added to form a complete computer.
The preceding section develops CPU organization, registers and the instruction cycle. Here the emphasis is on the properties visible when selecting or programming a processor. A microprocessor accepts binary instructions and data, processes them under stored-program control and produces results and control signals.
Principal Characteristics
Section titled “Principal Characteristics”| Characteristic | Meaning and consequence |
|---|---|
| Word length | Number of bits naturally processed by the ALU and registers, commonly 8, 16, 32 or 64 bits. A longer word can represent a wider integer or address but may require more hardware and energy. |
| Clock speed | Clock cycles per second, measured in hertz. A higher frequency shortens a cycle, but does not by itself guarantee higher performance because instruction count, cycles per instruction, cache misses and pipeline stalls also matter. |
| Instruction set | The operations, data types, registers, instruction formats and addressing modes exposed to a programmer or compiler. |
| Address-bus width | With independent address lines, at most addresses can be selected. The corresponding byte capacity is bytes only when each address denotes one byte. |
| Data-bus width | Number of bits transferred in one bus transaction. A word wider than the external data bus may require several transfers. |
Important microprocessor characteristics.
Do not equate word length, address width and data-bus width.: They may be equal in a simple processor, but they describe different properties and can have different numerical values.
Addressing Modes
Section titled “Addressing Modes”An addressing mode tells the CPU where an operand is found or how its effective address (EA) is calculated. Let be an address field in the instruction, a selected register and the contents of memory at address .
| Mode | Operand or effective address | Main use | Example |
|---|---|---|---|
| Immediate | Operand is the constant encoded in the instruction | Constants; no extra operand-memory read | MOV A, #05H |
| Register | Operand is the contents of | Fast arithmetic on values already in the CPU | ADD A, B |
| Direct | Fixed memory location or I/O register | LOAD R1, [2050H] | |
| Indirect | or , according to the instruction set | Pointers and dynamically selected data | LOAD R1, [R2] |
| Indexed | Arrays, tables and strings | LOAD R1, [TABLE+R2] |
Common addressing modes.
Immediate and register modes do not need an effective memory address for the operand. Direct addressing needs one operand-memory access after instruction fetch; memory-indirect addressing may need an additional access to obtain the pointer. Exact syntax and whether an index is scaled by element size are instruction-set dependent.
RISC and CISC
Section titled “RISC and CISC”Reduced Instruction Set Computer (RISC) designs emphasize a small, regular set of simple instructions, whereas Complex Instruction Set Computer (CISC) designs provide a larger set that may perform multi-step operations in one instruction.
| Feature | RISC tendency | CISC tendency |
|---|---|---|
| Instruction set | Fewer, simpler and more regular instructions | More numerous, specialized and complex instructions |
| Instruction format | Often fixed length with few formats | Often variable length with many formats |
| Memory access | Usually load/store: arithmetic uses registers | Instructions may operate directly on memory |
| Execution | Many instructions complete in one or a few cycles and pipeline regularly | Complex instructions may require several internal steps |
| Control hardware | Simpler hardwired decoding is common | More complex decode; microprogrammed control is common historically |
| Code size | May need more simple instructions | A complex instruction may replace several simple ones |
| Examples | ARM and RISC-V | x86 family |
Typical RISC–CISC comparison.
These are design tendencies, not absolute performance rules. A cache miss can make a RISC load take many cycles, and a modern CISC processor may decode a complex instruction into simple internal micro-operations. Performance must therefore be compared for a workload, not inferred from the acronym alone.
Microprocessor and Microcontroller
Section titled “Microprocessor and Microcontroller”A microcontroller combines a CPU with program/data memory and peripherals such as timers, GPIO, serial interfaces and often ADCs on one chip. It is optimized for dedicated embedded control; a microprocessor is normally the CPU-centered choice for systems requiring large external memory and high general-purpose performance.
| Feature | Microprocessor | Microcontroller |
|---|---|---|
| On-chip integration | Primarily CPU, cache and bus interfaces | CPU, memory and I/O peripherals on one chip |
| External components | More external RAM, storage and controllers required | Fewer components required for a complete controller |
| Typical application | PCs, workstations, servers and high-performance systems | Appliances, instruments, vehicles and embedded control |
| Cost and power | Generally higher system cost and power | Generally lower cost, power and board area |
| Expansion | Large memory and rich external expansion | Limited by on-chip resources, though external interfaces may be provided |
Microprocessor versus microcontroller.
Quick Review
Section titled “Quick Review”-
Microprocessor: CPU functions on a programmable chip; external memory and I/O complete the system.
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Addressing mode: specifies an operand or computes its effective address; immediate, register, direct, indirect and indexed are the standard forms.
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RISC: regular simple instructions and load/store organization; ARM and RISC-V are examples.
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CISC: larger instruction repertoire and potentially multi-step instructions; x86 is the standard example.
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Microcontroller: integrates CPU, memory and peripheral I/O for embedded control.