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Operational Amplifiers

An operational amplifier (op-amp) is a direct-coupled, very-high-gain differential voltage amplifier with two inputs and one single-ended output:

vo=AOL(v+−v−)=AOLvd.v_o=A_{OL}(v_+-v_-)=A_{OL}v_d.

It was named for its original use in analog computers to perform addition, subtraction, integration and differentiation.

The signal passes through a differential input stage (high input resistance, first gain and common-mode rejection), a high-gain and level-shift stage (most of AOLA_{OL} and dominant-pole compensation), and a class-AB push-pull output stage (low output resistance and load-current drive). Direct coupling permits amplification down to DC, but also allows offset and temperature drift to reach the output.

ParameterIdealTypical μ\muA741
Open-loop gain AOLA_{OL}∞\infty2×1052\times10^5 (106 dB106\,\mathrm{dB})
Input impedance ZiZ_i∞\infty2 MΩ2\,\mathrm{M\Omega}
Output impedance ZoZ_o0075 Ω75\,\Omega
Unity-gain bandwidth fTf_T∞\infty1 MHz1\,\mathrm{MHz}
CMRR∞\inftyabout 90 dB90\,\mathrm{dB}
Slew rate∞\infty0.5 V/μs0.5\,\mathrm{V/\mu s}
Input offset voltage VOSV_{OS}00about 1 mV1\,\mathrm{mV}
Input bias/offset currents00about 80/20 nA80/20\,\mathrm{nA}

Ideal and representative practical op-amp characteristics.

The low-frequency practical model has a large differential resistance RiR_i, a controlled source AOLvdA_{OL}v_d, and a non-zero series output resistance RoR_o. Its gain falls with frequency, output voltage and current are bounded by the supplies and output stage, and large-signal speed is limited by slew rate. The ideal model is the limiting case

AOL→∞,Ri→∞,Ro→0.A_{OL}\to\infty,\qquad R_i\to\infty,\qquad R_o\to0.

Open-loop gain AOLA_{OL}:
ratio vo/vdv_o/v_d without feedback. Large loop gain makes a feedback-set closed-loop gain accurate, but AOLA_{OL} falls with frequency.

Input and output impedance:
high ZiZ_i avoids source loading and low ZoZ_o makes output voltage insensitive to load. Voltage feedback generally raises the non-inverting closed-loop input impedance and lowers output impedance; both improvements diminish as loop gain falls at high frequency.

Common-mode rejection ratio:
if vcm=(v++v−)/2v_{cm}=(v_++v_-)/2, then

CMRR=∣AdAcm∣,CMRRdB=20log⁡10(CMRR).\boxed{\mathrm{CMRR}=\left|\frac{A_d}{A_{cm}}\right|},\qquad \mathrm{CMRR}_{\mathrm{dB}}=20\log_{10}(\mathrm{CMRR}).

High CMRR rejects hum or interference appearing equally at both inputs.

Power-supply rejection ratio:
under the common input-referred convention,

PSRR=∣ΔVSΔVOS∣,PSRRdB=20log⁡10(PSRR).\boxed{\mathrm{PSRR}=\left|\frac{\Delta V_S}{\Delta V_{OS}}\right|}, \qquad \mathrm{PSRR}_{\mathrm{dB}}=20\log_{10}(\mathrm{PSRR}).

Higher is better. A data sheet may instead quote supply sensitivity ΔVOS/ΔVS\Delta V_{OS}/\Delta V_S in μV/V\mathrm{\mu V/V}, for which smaller is better.

Input offset and currents:
VOSV_{OS} is the differential DC voltage required to force zero output. The input-current quantities are

IB=∣IB+∣+∣IB−∣2,IOS=∣∣IB+∣−∣IB−∣∣.\boxed{I_B=\frac{|I_{B+}|+|I_{B-}|}{2}},\qquad \boxed{I_{OS}=\bigl||I_{B+}|-|I_{B-}|\bigr|}.

Offset is multiplied approximately by noise gain, while currents create errors in source resistances. Making the DC resistance seen by both inputs equal cancels much of the average-bias-current error, not the mismatch IOSI_{OS}.

Drift and noise:
offset and current change with temperature and time; voltage/current noise limit the smallest usable signal. These are decisive in precision DC and sensor interfaces.

Input/output ranges:
the common-mode input range, output swing, output-current limit and supply rails must all be respected. Rail-to-rail labels do not imply zero headroom at every load.

For a dominant-pole compensated op-amp,

AOL(s)≃A01+s/ωp.A_{OL}(s)\simeq\frac{A_0}{1+s/\omega_p}.

At fpf_p the open-loop magnitude is 3 dB3\,\mathrm{dB} below A0A_0; beyond it the response falls at about 20 dB/decade20\,\mathrm{dB/decade}. The unity-gain or transition frequency fTf_T satisfies ∣AOL∣=1|A_{OL}|=1. Thus

GBW≃A0fp≃fT,BW≃fTAN,\boxed{\mathrm{GBW}\simeq A_0f_p\simeq f_T},\qquad \boxed{BW\simeq\frac{f_T}{A_N}},

where ANA_N is the closed-loop noise gain. The familiar ∣ACL∣BW≃fT|A_{CL}|BW\simeq f_T is valid only when signal gain and noise gain coincide.

Dominant-pole open-loop response and the gain–bandwidth trade-off.

Dominant-pole open-loop response and the gain–bandwidth trade-off.

The slew rate is the maximum large-signal output slope:

SR=max⁡∣dvodt∣.\boxed{SR=\max\left|\frac{\mathrm{d}v_o}{\mathrm{d}t}\right|}.

For vo=Vpsin⁡(2πft)v_o=V_p\sin(2\pi ft), the maximum required slope is 2πfVp2\pi fV_p; hence the full-power bandwidth is

fFP=SR2πVp.\boxed{f_{FP}=\frac{SR}{2\pi V_p}}.

This is distinct from small-signal bandwidth. The usable frequency is bounded by the stricter of GBW, slew rate, swing and output-current requirements.

A large step cannot make the output change faster than the slew rate.

A large step cannot make the output change faster than the slew rate.

After a step, settling time is the time required to enter and remain inside a stated error band such as 0.1%0.1\%, 0.01%0.01\% or one-half LSB. It may contain a slew interval, linear settling and ringing due to limited phase margin; therefore settling time is not interchangeable with either bandwidth or slew rate.

Inverting and non-inverting feedback circuits used in virtual-short derivations.

Inverting and non-inverting feedback circuits used in virtual-short derivations.

Since v+=0v_+=0, the inverting node is at virtual ground. KCL there gives

vi−v−R1=v−−voRf,v−=0,\frac{v_i-v_-}{R_1}=\frac{v_--v_o}{R_f}, \qquad v_-=0,

so

vovi=−RfR1,Zin=R1.\boxed{\frac{v_o}{v_i}=-\frac{R_f}{R_1}},\qquad \boxed{Z_{in}=R_1}.

The minus sign denotes 180∘180^\circ inversion. A bias-current compensation resistor RB≃R1∥RfR_B\simeq R_1\parallel R_f is often placed from v+v_+ to ground.

Here v−=v+=viv_-=v_+=v_i. With negligible input current, the feedback network is an unloaded divider:

vi=voR1R1+Rf⇒vovi=1+RfR1.v_i=v_o\frac{R_1}{R_1+R_f} \quad\Rightarrow\quad \boxed{\frac{v_o}{v_i}=1+\frac{R_f}{R_1}}.

The signal is not inverted and input impedance is ideally infinite. Directly connecting output to the inverting input gives the voltage follower, Av=1A_v=1, used to buffer a high-resistance source from a low-resistance load.

Summing, integrating and differentiating applications.

Summing, integrating and differentiating applications.

Applying KCL to the virtual-ground summing node gives

∑k=1mvkRk=−voRf⇒vo=−Rf∑k=1mvkRk.\sum_{k=1}^{m}\frac{v_k}{R_k}=-\frac{v_o}{R_f} \quad\Rightarrow\quad \boxed{v_o=-R_f\sum_{k=1}^{m}\frac{v_k}{R_k}}.

Equal Rk=RR_k=R produce a scaled sum; unequal values produce a weighted sum. Applications include audio mixing, level shifting and DACs.

For the standard four-resistor circuit, exact ratio matching gives

R2R1=R4R3=k⇒vo=k(v2−v1).\frac{R_2}{R_1}=\frac{R_4}{R_3}=k \quad\Rightarrow\quad \boxed{v_o=k(v_2-v_1)}.

Equal common-mode components cancel ideally. Ratio mismatch converts common-mode voltage to differential error and therefore limits circuit CMRR.

With Zf=1/(sC)Z_f=1/(sC),

Vo(s)Vi(s)=−1sRC,vo(t)=vo(0)−1RC∫0tvi(τ) dτ.\boxed{\frac{V_o(s)}{V_i(s)}=-\frac{1}{sRC}},\qquad \boxed{v_o(t)=v_o(0)-\frac{1}{RC}\int_0^t v_i(\tau)\,\mathrm{d}\tau}.

A constant input gives a ramp of slope dvo/dt=−vi/(RC)\mathrm{d}v_o/\mathrm{d}t=-v_i/(RC); a square wave gives a triangular wave. Because the ideal circuit has infinite DC gain, offsets drive it into saturation. A large resistor parallel to CC gives a finite low-frequency gain in a practical integrator.

The capacitor current i=C dvi/dti=C\,\mathrm{d}v_i/\mathrm{d}t flows through RR, so

Vo(s)Vi(s)=−sRC,vo(t)=−RCdvi(t)dt.\boxed{\frac{V_o(s)}{V_i(s)}=-sRC},\qquad \boxed{v_o(t)=-RC\frac{\mathrm{d}v_i(t)}{\mathrm{d}t}}.

A triangular input gives a square output and a step gives a narrow pulse. Since ∣H(jω)∣=ωRC|H(j\omega)|=\omega RC rises without bound, the ideal circuit amplifies high-frequency noise and can become unstable. A practical differentiator adds a series input resistor and a small capacitor across RR to confine operation to a finite band.

CircuitMathematical action/useMain limitation
SummerWeighted addition; mixers and DACsResistor accuracy and output range
Difference amplifierSubtraction/common-mode rejectionRatio matching determines CMRR
Integrator1/s1/s; ramps, waveform generation, filtersOffset-driven DC saturation
Differentiatorss; edge detection and pulse shapingNoise gain and high-frequency stability

Linear op-amp applications and their dominant practical limits.

TypeDefining featuresTrade-offTypical use
General-purposeBalanced gain, speed, offset and costNo extreme specificationBasic amplifiers and filters
High-speedHigh GBW/SR, short settlingPower, noise, layout sensitivityVideo, pulse and fast ADC drive
PrecisionLow offset, drift, bias and noise; high CMRR/PSRROften lower speed or higher costBridges and DC measurement
PowerHigh output current/voltage and protectionHeat and large packageActuators, speakers, supplies
ComparatorFast open-loop switching, logic outputPoor linear-feedback behaviorThreshold/zero crossing
NortonResponds to i+−i−i_+-i_-; often single supplyNonstandard input behaviorCurrent-mode filters/oscillators
InstrumentationHigh ZiZ_i, accurate differential gain/CMRRMatching and extra amplifiersSensor and biomedical signals
IsolationGalvanic input–output barrierBandwidth, error and costHigh-side and safety isolation

Classification by the property optimized.

A comparator may share the triangle symbol but is optimized to switch open loop; an ordinary op-amp used this way may have slow saturation recovery, invalid common-mode inputs or unsuitable output levels. A Norton amplifier forms an input-current difference. An isolation amplifier transfers the signal optically, capacitively or magnetically while maintaining separate grounds; isolation rating, leakage and barrier safety are specifications in addition to gain and bandwidth.

Three-op-amp instrumentation amplifier; one resistor sets first-stage gain.

Three-op-amp instrumentation amplifier; one resistor sets first-stage gain.

The two non-inverting input amplifiers buffer both sources. Their inverting nodes are joined by RGR_G, so the differential current is (v2−v1)/RG(v_2-v_1)/R_G and each equal feedback resistor R1R_1 contributes gain. The matched final subtractor rejects the buffered common-mode voltage. For the shown ratios,

vo=(1+2R1RG)R3R2(v2−v1).\boxed{v_o=\left(1+\frac{2R_1}{R_G}\right) \frac{R_3}{R_2}(v_2-v_1)}.